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TPDS
2010
174views more  TPDS 2010»
15 years 5 months ago
Parallel Two-Sided Matrix Reduction to Band Bidiagonal Form on Multicore Architectures
The objective of this paper is to extend, in the context of multicore architectures, the concepts of tile algorithms [Buttari et al., 2007] for Cholesky, LU, QR factorizations to t...
Hatem Ltaief, Jakub Kurzak, Jack Dongarra
EWSN
2009
Springer
16 years 7 months ago
Experimental Study of the Impact of WLAN Interference on IEEE 802.15.4 Body Area Networks
As the number of wireless devices sharing the unlicensed 2.4 GHz ISM band increases, interference is becoming a problem of paramount importance. We experimentally investigate the e...
Jan-Hinrich Hauer, Vlado Handziski, Adam Wolisz
ICCD
2005
IEEE
119views Hardware» more  ICCD 2005»
16 years 3 months ago
Deployment of Better Than Worst-Case Design: Solutions and Needs
The advent of nanometer feature sizes in silicon fabrication has triggered a number of new design challenges for computer designers. These challenges include design complexity and...
Todd M. Austin, Valeria Bertacco
IISWC
2008
IEEE
16 years 1 months ago
PARSEC vs. SPLASH-2: A quantitative comparison of two multithreaded benchmark suites on Chip-Multiprocessors
The PARSEC benchmark suite was recently released and has been adopted by a significant number of users within a short amount of time. This new collection of workloads is not yet ...
Christian Bienia, Sanjeev Kumar, Kai Li
163
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EUROSYS
2010
ACM
15 years 12 months ago
NOVA: a microhypervisor-based secure virtualization architecture
The availability of virtualization features in modern CPUs has reinforced the trend of consolidating multiple guest operating systems on top of a hypervisor in order to improve pl...
Udo Steinberg, Bernhard Kauer