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» Trends in High Performance Computing
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DSN
2007
IEEE
16 years 1 months ago
Using Process-Level Redundancy to Exploit Multiple Cores for Transient Fault Tolerance
Transient faults are emerging as a critical concern in the reliability of general-purpose microprocessors. As architectural trends point towards multi-threaded multi-core designs,...
Alex Shye, Tipp Moseley, Vijay Janapa Reddi, Josep...
185
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IPPS
2003
IEEE
16 years 13 hour ago
Homeostatic and Tendency-Based CPU Load Predictions
The dynamic nature of a resource-sharing environment means that applications must be able to adapt their behavior in response to changes in system status. Predictions of future sy...
Lingyun Yang, Ian T. Foster, Jennifer M. Schopf
IEEEPACT
2000
IEEE
15 years 11 months ago
aSOC: A Scalable, Single-Chip Communications Architecture
As on-chip integration matures, single-chip system designers must not only be concerned with component-level issues such as performance and power, but also with onchip system-leve...
Jian Liang, Sriram Swaminathan, Russell Tessier
TOG
2002
112views more  TOG 2002»
15 years 6 months ago
Ray tracing on programmable graphics hardware
Recently a breakthrough has occurred in graphics hardware: fixed function pipelines have been replaced with programmable vertex and fragment processors. In the near future, the gr...
Timothy J. Purcell, Ian Buck, William R. Mark, Pat...
DASFAA
2006
IEEE
153views Database» more  DASFAA 2006»
15 years 10 months ago
Dissemination of Dynamic Data: Semantics, Algorithms, and Performance
Abstract The Internet and the Web are increasingly used to disseminate fast changing data such as sensor data, traffic and weather information, stock prices, sports scores, and eve...
Krithi Ramamritham