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PPOPP
2009
ACM
16 years 7 months ago
An efficient transactional memory algorithm for computing minimum spanning forest of sparse graphs
Due to power wall, memory wall, and ILP wall, we are facing the end of ever increasing single-threaded performance. For this reason, multicore and manycore processors are arising ...
Seunghwa Kang, David A. Bader
HPCA
2002
IEEE
16 years 7 months ago
Evaluation of a Multithreaded Architecture for Cellular Computing
Cyclops is a new architecture for high performance parallel computers being developed at the IBM T. J. Watson Research Center. The basic cell of this architecture is a single-chip...
Calin Cascaval, José G. Castaños, Lu...
ICIP
2005
IEEE
16 years 8 months ago
Automatic classification of breast density
A recent trend in digital mammography are Computer-Aided Diagnosis systems, which are computerised tools designed to assist radiologists. Most of these systems are used for the au...
Arnau Oliver, Jordi Freixenet, Reyer Zwiggelaar
ISCAS
2005
IEEE
182views Hardware» more  ISCAS 2005»
16 years 7 days ago
A new reconfigurable modem architecture for 3G multi-standard wireless communication systems
– The trend in communication systems is towards more rapidly changing specifications with shorter time intervals between updates of existing standards. This results in a coexiste...
Jung-Ho Kim, Dong Sam Ha, Jeffrey H. Reed
ASPDAC
2007
ACM
122views Hardware» more  ASPDAC 2007»
15 years 10 months ago
A Novel Reconfigurable Low Power Distributed Arithmetic Architecture for Multimedia Applications
- The use of reconfigurable cores in system on chip (SoC) designs is increasingly becoming a trend. Such cores are being used for their flexibility, powerful functionality and low ...
Zhenyu Liu, Tughrul Arslan, Ahmet T. Erdogan