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RTCSA
2007
IEEE
16 years 26 days ago
An MPSoC Performance Estimation Framework Using Transaction Level Modeling
— To use the tremendous hardware resources available in next generation MultiProcessor Systems-on-Chip (MPSoC) efficiently, rapid and accurate design space exploration (DSE) met...
Rabie Ben Atitallah, Smaïl Niar, Samy Meftali...
LCN
2003
IEEE
15 years 12 months ago
Evaluating System Performance in Gigabit Networks
- With the current wide deployment of Gigabit Ethernet technology in the backbone and workgroup switches, the network performance bottleneck has shifted for the first time in nearl...
Khaled Salah, K. El-Badawi
IC
2003
15 years 8 months ago
Improving the Performance of Grid-Enabled MPI by Intelligent Message Compression
In the Grid computing, one of the most important issues related to the Message Passing Interface (MPI) is to guarantee the expected performance in the wide area networks. To achie...
Hwang-Jik Lee, Kyung-Lang Park, Kwang-Won Koh, Oh-...
IPPS
2007
IEEE
16 years 26 days ago
A Cost-Effective, High Bandwidth Server I/O network Architecture for Cluster Systems
In this paper we present a cost-effective, high bandwidth server I/O network architecture, named PaScal (Parallel and Scalable). We use the PaScal server I/O network to support da...
Hsing-bung Chen, Gary Grider, Parks Fields
ANCS
2009
ACM
15 years 4 months ago
An adaptive hash-based multilayer scheduler for L7-filter on a highly threaded hierarchical multi-core server
Ubiquitous multi-core-based web servers and edge routers are increasingly popular in deploying computationally intensive Deep Packet Inspection (DPI) programs. Previous work has s...
Danhua Guo, Guangdeng Liao, Laxmi N. Bhuyan, Bin L...