3396 search results - page 451 / 680 » Tree representations of graphs |
184
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ICSE
2008
IEEE-ACM
16 years 6 months ago
2008
IEEE-ACM
Understanding the structure of large existing (and evolving) software systems is a major challenge for software engineers. In reverse engineering, we aim to compute, for a given s...
153
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ICCAD
2007
IEEE
2007
IEEE
Optimal polynomial-time interprocedural register allocation for high-level synthesis and ASIP design
16 years 3 months ago
—Register allocation, in high-level synthesis and ASIP design, is the process of determining the number of registers to include in the resulting circuit or processor. The goal is...
158
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IEEEPACT
2007
IEEE
16 years 28 days ago
2007
IEEE
Continued scaling of CMOS technology to smaller transistor sizes makes modern processors more susceptible to both transient and permanent hardware faults. Circuitlevel techniques ...
206
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PUK
2003
15 years 8 months ago
2003
This paper exploits the spatial representation of state space problem graphs to preprocess and enhance heuristic search engines. It combines classical AI exploration with computati...
180
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CGF
2010
15 years 6 months ago
2010
Visualizing graphs containing many nodes and edges efficiently is quite challenging. Drawings of such graphs generally suffer from visual clutter induced by the large amount of ed...