Sciweavers

10462 search results - page 1897 / 2093
» Towards a
Sort
View
IPPS
2006
IEEE
16 years 17 days ago
A study of the on-chip interconnection network for the IBM Cyclops64 multi-core architecture
The designs of high-performance processor architectures are moving toward the integration of a large number of multiple processing cores on a single chip. The IBM Cyclops-64 (C64)...
Yingping Zhang, Taikyeong Jeong, Fei Chen, Haiping...
IPPS
2006
IEEE
16 years 17 days ago
High-performance computing in remotely sensed hyperspectral imaging: the Pixel Purity Index algorithm as a case study
The incorporation of last-generation sensors to airborne and satellite platforms is currently producing a nearly continual stream of high-dimensional data, and this explosion in t...
Antonio Plaza, David Valencia, Javier Plaza
IPPS
2006
IEEE
16 years 17 days ago
Compatible phase co-scheduling on a CMP of multi-threaded processors
The industry is rapidly moving towards the adoption of Chip Multi-Processors (CMPs) of Simultaneous MultiThreaded (SMT) cores for general purpose systems. The most prominent use o...
Ali El-Moursy, R. Garg, David H. Albonesi, Sandhya...
IROS
2006
IEEE
147views Robotics» more  IROS 2006»
16 years 17 days ago
Opportunistic Use of Vision to Push Back the Path-Planning Horizon
Abstract— Mobile robots need maps or other forms of geometric information about the environment to navigate. The mobility sensors (LADAR, stereo, etc.) on these robotic vehicles ...
Bart C. Nabbe, Derek Hoiem, Alexei A. Efros, Marti...
ISCA
2006
IEEE
137views Hardware» more  ISCA 2006»
16 years 17 days ago
Multiple Instruction Stream Processor
Microprocessor design is undergoing a major paradigm shift towards multi-core designs, in anticipation that future performance gains will come from exploiting threadlevel parallel...
Richard A. Hankins, Gautham N. Chinya, Jamison D. ...
« Prev « First page 1897 / 2093 Last » Next »