1245 search results - page 76 / 249 » Topology generation based on network design heuristics |
242
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ISPD
2012
ACM
14 years 1 months ago
2012
ACM
Gate sizing in VLSI design is a widely-used method for power or area recovery subject to timing constraints. Several previous works have proposed gate sizing heuristics for power ...
156
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ISCAS
2008
IEEE
16 years 18 days ago
2008
IEEE
— This paper presents ATLAS - a framework for automated analog circuit synthesis that comprises of both topology generation and subsequent circuit sizing. A hierarchically arrang...
171
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DAC
2000
ACM
15 years 10 months ago
2000
ACM
The ordered tree (O-tree) representation has recently gained much interest in layout design automation. Different from previous topological representations of non-slicing floorpl...
172
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ICC
2008
IEEE
16 years 19 days ago
2008
IEEE
—Taking advantage of the frequency diversity and multiuser diversity in OFDMA based wireless networks, dynamic subcarrier assignment mechanisms have shown to be able to achieve m...
225
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ICOIN
2003
Springer
15 years 11 months ago
2003
Springer
In this paper, we propose an architecture of name service system which can provide mobile nodes in IPv6 mobile ad-hoc network with the name-to-address resolution and service discov...