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CODES
2005
IEEE
16 years 5 days ago
Dynamic phase analysis for cycle-close trace generation
For embedded system development, several companies provide cross-platform development tools to aid in debugging, prototyping and optimization of programs. These are full system em...
Cristiano Pereira, Jeremy Lau, Brad Calder, Rajesh...
DATE
2004
IEEE
154views Hardware» more  DATE 2004»
15 years 10 months ago
Fast Exploration of Parameterized Bus Architecture for Communication-Centric SoC Design
For successful SoC design, efficient and scalable communication architecture is crucial. Some bus interconnects now provide configurable structures to meet this requirement of an ...
Chulho Shin, Young-Taek Kim, Eui-Young Chung, Kyu-...
TVLSI
2008
187views more  TVLSI 2008»
15 years 6 months ago
A Design Flow for Architecture Exploration and Implementation of Partially Reconfigurable Processors
During the last years, the growing application complexity, design, and mask costs have compelled embedded system designers to increasingly consider partially reconfigurable applica...
Kingshuk Karuri, Anupam Chattopadhyay, Xiaolin Che...
ISPASS
2010
IEEE
16 years 1 months ago
Visualizing complex dynamics in many-core accelerator architectures
—While many-core accelerator architectures, such as today’s Graphics Processing Units (GPUs), offer orders of magnitude more raw computing power than contemporary CPUs, their m...
Aaron Ariel, Wilson W. L. Fung, Andrew E. Turner, ...
IEEEMM
2002
134views more  IEEEMM 2002»
15 years 6 months ago
A Middleware Architecture for Open and Interoperable GISs
an abstract model for information sharing and integration and use it to develop an architecture for building open, component-based, interoperable systems. A geographic information ...
Steven H. Wong, Steven L. Swartz, Dilip Sarkar