4164 search results - page 80 / 833 » Timing model reduction for hierarchical timing analysis |
180
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RTSS
2007
IEEE
16 years 16 days ago
2007
IEEE
We present a performance analysis technique for distributed real-time systems in a setting where certain components are modeled in a purely functional manner, while the remainin...
162
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ASPDAC
2004
ACM
15 years 11 months ago
2004
ACM
Abstract— This paper presents a power grid analyzer that combines a divide-and-conquer strategy with a random-walk engine. A single-level hierarchical method is first described ...
189
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ENGL
2008
15 years 6 months ago
2008
Because most of the procedures in defect inspection process of TFT-LCD module assembly are examined manually through human vision, cycle time estimation for this particular process...
171
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FM
2006
Springer
15 years 10 months ago
2006
Springer
Symmetry reduction techniques can help to combat the state space explosion problem for model checking, but are restricted by the hard problem of determining equivalence of states d...
156
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ITC
1997
IEEE
15 years 10 months ago
1997
IEEE
A deterministic-partitioning technique and an improved analysis scheme for fault diagnosis in Scan-Based BIST is proposed. The incorporation of the superposition principle to the ...