Sciweavers

4164 search results - page 72 / 833
» Timing model reduction for hierarchical timing analysis
Sort
View
CSDA
2006
116views more  CSDA 2006»
15 years 6 months ago
Bayesian multiscale analysis for time series data
A recently proposed Bayesian multiscale tool for exploratory analysis of time series data is reconsidered and umerous important improvements are suggested. The improvements are in...
Tor Arne Øigård, Håvard Rue, Fr...
ISNN
2011
Springer
14 years 9 months ago
Orthogonal Feature Learning for Time Series Clustering
This paper presents a new method that uses orthogonalized features for time series clustering and classification. To cluster or classify time series data, either original data or...
Xiaozhe Wang, Leo Lopes
FPGA
1999
ACM
139views FPGA» more  FPGA 1999»
15 years 10 months ago
Trading Quality for Compile Time: Ultra-Fast Placement for FPGAs
The demand for high-speed FPGA compilation tools has occurred for three reasons: first, as FPGA device capacity has grown, the computation time devoted to placement and routing h...
Yaska Sankar, Jonathan Rose
ITC
2002
IEEE
114views Hardware» more  ITC 2002»
15 years 11 months ago
Scan Power Reduction Through Test Data Transition Frequency Analysis
Significant reductions in test application times can be achieved through parallelizing core tests; however, simultaneous test of various cores may result in exceeding power thres...
Ozgur Sinanoglu, Ismet Bayraktaroglu, Alex Orailog...
SACMAT
2009
ACM
16 years 21 days ago
Towards formal security analysis of GTRBAC using timed automata
An access control system is often viewed as a state transition system. Given a set of access control policies, a general safety requirement in such a system is to determine whethe...
Samrat Mondal, Shamik Sural, Vijayalakshmi Atluri