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DAC
2006
ACM
16 years 7 months ago
A thermally-aware performance analysis of vertically integrated (3-D) processor-memory hierarchy
Three-dimensional (3-D) integrated circuits have emerged as promising candidates to overcome the interconnect bottlenecks of nanometer scale designs. While they offer several othe...
Gian Luca Loi, Banit Agrawal, Navin Srivastava, Sh...
TPDS
2010
87views more  TPDS 2010»
15 years 5 months ago
An ISP-Friendly File Distribution Protocol: Analysis, Design, and Implementation
Abstract—In the past few years, P2P file distribution applications (e.g., BitTorrent) are becoming so popular that they are the dominating source of Internet traffic. This crea...
Minghong Lin, John C. S. Lui, Dah-Ming Chiu
CHI
2003
ACM
16 years 7 months ago
"This is a lot easier!": constrained movement speeds navigation
This paper reports on an experiment comparing constrained and unconstrained movement in a 2D zooming environment. Results for a directed search task showed a significant decrease ...
Susanne Jul
ICASSP
2009
IEEE
16 years 1 months ago
Identification of neurons participating in cell assemblies
Chances to detect assembly activity are expected to increase if the spiking activities of large numbers of neurons are recorded simultaneously. Although such massively parallel re...
Sonja Grün, Denise Berger, Christian Borgelt
ECRTS
2008
IEEE
16 years 1 months ago
WCET-driven Cache-based Procedure Positioning Optimizations
Procedure Positioning is a well known compiler optimization aiming at the improvement of the instruction cache behavior. A contiguous mapping of procedures calling each other freq...
Paul Lokuciejewski, Heiko Falk, Peter Marwedel