4164 search results - page 319 / 833 » Timing model reduction for hierarchical timing analysis |
207
click to vote
TACAS
1998
Springer
15 years 11 months ago
1998
Springer
In this paper, we report on an application of the validation and veri cation tool kit Uppaal in the design and analysis of a prototype gear controller, carried out in a joint proje...
147
click to vote
DAC
2003
ACM
16 years 7 months ago
2003
ACM
Noise affects circuit operation by increasing gate delays and causing latches to capture incorrect values. This paper proposes a method of characterizing correlation of signal tra...
159
click to vote
CIDM
2007
IEEE
16 years 1 months ago
2007
IEEE
Abstract— We present a method for performing mode classification of real-time streams of GPS surface position data. Our approach has two parts: an algorithm for robust, unconstr...
191
click to vote
WCET
2010
15 years 4 months ago
2010
To take full advantage of the increasingly used shared-memory multicore architectures, software algorithms will need to be parallelized over multiple threads. This means that thre...
172
click to vote
CDC
2008
IEEE
16 years 1 months ago
2008
IEEE
Abstract— A common approach to designing feedback controllers for nonlinear partial differential equations (PDEs) is to linearize the system about an equilibrium and use the line...