4164 search results - page 287 / 833 » Timing model reduction for hierarchical timing analysis |
177
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TVCG
1998
15 years 6 months ago
1998
—Recently, multiresolution visualization methods have become an indispensable ingredient of real-time interactive postprocessing. The enormous databases, typically coming along w...
163
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DATE
2004
IEEE
15 years 10 months ago
2004
IEEE
Noise affects circuit operation by increasing gate delays and causing latches to capture incorrect values. Noise analysis techniques can detect some of such noise faults, but accu...
196
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DAC
2005
ACM
15 years 8 months ago
2005
ACM
This paper presents a new method for designing test wrappers for embedded cores with multiple clock domains. By exploiting the use of multiple shift frequencies, the proposed meth...
212
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JCNS
2000
15 years 6 months ago
2000
We explore a computationally efficient method of simulating realistic networks of neurons introduced by Knight, Manin, and Sirovich (1996) in which integrate-and-fire neurons are ...
175
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GECCO
2007
Springer
16 years 25 days ago
2007
Springer
— In this paper, a parallel model of multi-objective genetic algorithm supposing a grid environment is discussed. In this proposed parallel model, we extended master-slave model ...