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» Timing model reduction for hierarchical timing analysis
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DATE
2008
IEEE
129views Hardware» more  DATE 2008»
16 years 1 months ago
Quantitative Evaluation in Embedded System Design: Trends in Modeling and Analysis Techniques
The evaluation of extra-functional properties of embedded systems, such as reliability, timeliness, and energy consumption, as well as dealing with uncertainty, e.g., in the timin...
Joost-Pieter Katoen
VLSID
2004
IEEE
147views VLSI» more  VLSID 2004»
16 years 7 months ago
Computing Silent Gate Models for Noise Analysis from Slew and Delay Tables
Abstract--In this paper, we present a new approach to calculate the steady state resistance values for CMOS library gates. These resistances are defined as simple equivalent models...
Shabbir H. Batterywala, Narendra V. Shenoy
MVA
1996
123views Computer Vision» more  MVA 1996»
15 years 8 months ago
Automatic Configuration of Systems for Texture Analysis
Automatic visual inspection plays a growing role in today's efforts to reduce the costs of industrial production. Three to ten months of man power have to be invested for the...
Christian Küblbeck, Christoph Schittko, Thoma...
WSC
1998
15 years 8 months ago
Assessment of Simulation Models Based on Trace-File Analysis: A Metamodeling Approach
Many important characteristics of simulation models, including queuing models, can be investigated by the use of metamodels. Problems in qualitative analysis such as analyzing mod...
Juri Tolujev, Peter Lorenz, Daniel Beier, Thomas J...
DATE
2010
IEEE
171views Hardware» more  DATE 2010»
15 years 11 months ago
Digital statistical analysis using VHDL
—Variations of process parameters have an important impact on reliability and yield in deep sub micron IC technologies. One methodology to estimate the influence of these effects...
Manfred Dietrich, Uwe Eichler, Joachim Haase