4164 search results - page 227 / 833 » Timing model reduction for hierarchical timing analysis |
189
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HPCA
2009
IEEE
16 years 7 months ago
2009
IEEE
Decreasing hardware reliability is expected to impede the exploitation of increasing integration projected by Moore's Law. There is much ongoing research on efficient fault t...
177
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ACISICIS
2005
IEEE
16 years 6 days ago
2005
IEEE
: This paper presents a queuing analysis model of a PC-based software router supporting IPv6-IPv4 translation for residential gateway. The proposed models are M/G/1/K or MMPP-2/G/1...
172
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NCA
2002
IEEE
15 years 6 months ago
2002
IEEE
One of the key problems in forming a smooth model from input-output data is the determination of which input variables are relevant in predicting a given output. In this paper we ...
195
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INFOCOM
2010
IEEE
15 years 5 months ago
2010
IEEE
—Despite much research on the throughput of relaying networks under idealized interference models, many practical wireless networks rely on physical-layer protocols that preclude...
186
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DAC
2008
ACM
2008
ACM
Model checking based analysis of end-to-end latency in embedded, real-time systems with clock drifts
16 years 7 months ago
End-to-end latency of messages is an important design parameter that needs to be within specified bounds for the correct functioning of distributed real-time control systems. In t...