Sciweavers

4164 search results - page 165 / 833
» Timing model reduction for hierarchical timing analysis
Sort
View
ICML
2001
IEEE
16 years 7 months ago
Toward Optimal Active Learning through Sampling Estimation of Error Reduction
This paper presents an active learning method that directly optimizes expected future error. This is in contrast to many other popular techniques that instead aim to reduce versio...
Nicholas Roy, Andrew McCallum
IFIPTCS
2000
15 years 10 months ago
Masaccio: A Formal Model for Embedded Components
Masaccio is a formal model for hybrid dynamical systems which are built from atomic discrete components (di erence equations) and atomic continuous components (di erential equation...
Thomas A. Henzinger
COCOON
1999
Springer
15 years 10 months ago
Area Minimization for Grid Visibility Representation of Hierarchically Planar Graphs
Abstract. Hierarchical graphs are an important class of graphs for modelling many real applications in software and information visualization. In this paper, we shall investigate t...
Xuemin Lin, Peter Eades
DAC
2006
ACM
16 years 7 months ago
Statistical logic cell delay analysis using a current-based model
A statistical model for the purpose of logic cell timing analysis in the presence of process variations is presented. A new current-based cell delay model is utilized, which can a...
Hanif Fatemi, Shahin Nazarian, Massoud Pedram
MASCOTS
2004
15 years 7 months ago
A Computational Complexity-Aware Model for Performance Analysis of Software Servers
Queueing models are routinely used to analyze the performance of software systems. However, contrary to common assumptions, the time that a software server takes to complete jobs ...
Vipul Mathur, Varsha Apte