4164 search results - page 153 / 833 » Timing model reduction for hierarchical timing analysis |
184
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ISSS
2002
IEEE
15 years 11 months ago
2002
IEEE
Datapath width optimization is very effective for reducing the area of a custom-made embedded system. The trivial way of optimization is to iteratively customize, evaluate, and r...
196
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DEON
2006
Springer
15 years 10 months ago
2006
Springer
In this paper we extend earlier work on deontic deadlines in CTL to the framework of alternating time temporal logic (ATL). The resulting setting enables us to model several concep...
173
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FDL
2006
IEEE
16 years 14 days ago
2006
IEEE
To ensure correctness and performance of real-time embedded systems, early evaluation of properties is needed. Based on design experience for real-time systems and using the conce...
171
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INFOCOM
2007
IEEE
16 years 22 days ago
2007
IEEE
Abstract— This paper investigates the near-memoryless behavior of the service time for IEEE 802.11 saturated single-hop ad hoc networks. We show that the number of packets succes...
175
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TAL
2010
Springer
15 years 1 months ago
2010
Springer
This paper provides a linguistic semantic analysis of time and aspect in natural languages. On the basis of topological concepts, notions are introduced like the basic aspectual op...