4164 search results - page 123 / 833 » Timing model reduction for hierarchical timing analysis |
152
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ISQED
2006
IEEE
16 years 11 days ago
2006
IEEE
Current-based gate modeling achieves a new level of accuracy in nanoscale design timing and signal integrity analysis. However, to generate current-based gate models requires addi...
153
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ICCAD
2006
IEEE
16 years 3 months ago
2006
IEEE
— For 65nm and below devices, even after optical proximity correction (OPC), the gate may still be non-rectangular. There are several limited works on the device and circuit char...
155
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EOR
2006
15 years 6 months ago
2006
In this paper we develop an open queueing network for optimal design of multi-stage assemblies, in which each service station represents a manufacturing or assembly operation. The...
202
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KBSE
2000
IEEE
15 years 10 months ago
2000
IEEE
The majority of work carried out in the formal methods community throughout the last three decades has (for good reasons) been devoted to special languages designed to make it eas...
180
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ICCV
2009
IEEE
16 years 11 months ago
2009
IEEE
We use concepts from chaos theory in order to model
nonlinear dynamical systems that exhibit deterministic behavior.
Observed time series from such a system can be embedded
into...