4164 search results - page 114 / 833 » Timing model reduction for hierarchical timing analysis |
173
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ICTAC
2005
Springer
15 years 12 months ago
2005
Springer
Abstract. This paper introduces the notion of finite precision timed automata (FPTAs) and proposes a data structure to represent its symbolic states. To reduce the state space, FP...
143
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VTS
2003
IEEE
15 years 11 months ago
2003
IEEE
— In this paper, we study the problem of delay defect diagnosis based on statistical timing models. We propose a diagnosis algorithm that can effectively utilize statistical timi...
180
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DAC
2006
ACM
16 years 9 days ago
2006
ACM
Reduction of the on-chip memory size is a key issue in video codec system design. Because video codec applications involve complex algorithms that are both data-intensive and cont...
165
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SEW
2003
IEEE
15 years 11 months ago
2003
IEEE
Component-based software engineering (CBSE) and the use of (de-facto) standard component models have gained popularity in recent years, particularly in the development of desktop ...
143
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RTSS
1998
IEEE
15 years 10 months ago
1998
IEEE
: The Time-Triggered (TT) model of computation is a model for the representation and analysis of the design of large hard real-time systems. Central to this model is the concept of...