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» Timing model reduction for hierarchical timing analysis
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ICML
2008
IEEE
16 years 7 months ago
The dynamic hierarchical Dirichlet process
The dynamic hierarchical Dirichlet process (dHDP) is developed to model the timeevolving statistical properties of sequential data sets. The data collected at any time point are r...
Lu Ren, David B. Dunson, Lawrence Carin
ASPDAC
2001
ACM
126views Hardware» more  ASPDAC 2001»
15 years 10 months ago
A new partitioning scheme for improvement of image computation
Abstract-- Image computation is the core operation for optimization and formal verification of sequential systems like controllers or protocols. State exploration techniques based ...
Christoph Meinel, Christian Stangier
DATE
2009
IEEE
107views Hardware» more  DATE 2009»
16 years 1 months ago
Learning early-stage platform dimensioning from late-stage timing verification
— Today's innovations in the automotive sector are, to a great extent, based on electronics. The increasing integration complexity and stringent cost reduction goals turn E/...
Kai Richter, Marek Jersak, Rolf Ernst
ISNN
2010
Springer
15 years 4 months ago
MULP: A Multi-Layer Perceptron Application to Long-Term, Out-of-Sample Time Series Prediction
Abstract. A forecasting approach based on Multi-Layer Perceptron (MLP) Artificial Neural Networks (named by the authors MULP) is proposed for the NN5 111 time series long-term, out...
Eros Pasero, Giovanni Raimondo, Suela Ruffa
CAV
2003
Springer
140views Hardware» more  CAV 2003»
15 years 10 months ago
Rabbit: A Tool for BDD-Based Verification of Real-Time Systems
Thispapergivesashort overviewofa model checking tool forreal-time systems. The modeling language are timed automata extended with concepts for modular modeling. The tool provides r...
Dirk Beyer, Claus Lewerentz, Andreas Noack