435 search results - page 24 / 87 » Timing analysis of asynchronous circuits using timed automat... |
169
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GLVLSI
2008
IEEE
16 years 12 days ago
2008
IEEE
Statistical static timing analysis (SSTA) plays a key role in determining performance of the VLSI circuits implemented in state-of-the-art CMOS technology. A pre-requisite for emp...
145
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FM
2006
Springer
15 years 9 months ago
2006
Springer
We propose a new look at one of the most fundamental types of behavioral interfaces: discrete time specifications of communication--directly related to the work of de Alfaro and H...
135
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ICCAD
1999
IEEE
15 years 10 months ago
1999
IEEE
A common approach to performance optimization of circuits focuses on re-synthesis to reduce the length of all paths greater than the desired delay . We describe a new delay optimi...
150
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DATE
2005
IEEE
15 years 11 months ago
2005
IEEE
—Presented are a methodology and a DFII-based tool for AC-stability analysis of a wide variety of closed-loop continuous-time (operational amplifiers and other linear circuits). ...
144
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ICCAD
2003
IEEE
16 years 2 months ago
2003
IEEE
Static timing analysis is a critical step in design of any digital integrated circuit. Technology and design trends have led to significant increase in environmental and process v...