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DAC
2007
ACM
16 years 8 months ago
Off-chip Decoupling Capacitor Allocation for Chip Package Co-Design
Off-chip decoupling capacitor (decap) allocation is a demanding task during package and chip codesign. Existing approaches can not handle large numbers of I/O counts and large num...
Hao Yu, Chunta Chu, Lei He
DAC
2001
ACM
16 years 8 months ago
Performance-Driven Multi-Level Clustering with Application to Hierarchical FPGA Mapping
In this paper, we study the problem of performance-driven multi-level circuit clustering with application to hierarchical FPGA designs. We first show that the performance-driven m...
Jason Cong, Michail Romesis
DAC
2001
ACM
16 years 8 months ago
Transformations for the Synthesis and Optimization of Asynchronous Distributed Control
Asynchronous design has been the focus of renewed interest. However, a key bottleneck is the lack of high-quality CAD tools for the synthesis of large-scale systems which also all...
Michael Theobald, Steven M. Nowick
DAC
2003
ACM
16 years 8 months ago
Automatic trace analysis for logic of constraints
Verification of system designs continues to be a major challenge today. Simulation remains the primary tool for making sure that implementations perform as they should. We present...
Xi Chen, Harry Hsieh, Felice Balarin, Yosinori Wat...
DAC
2005
ACM
16 years 8 months ago
Logic block clustering of large designs for channel-width constrained FPGAs
In this paper we present a system level technique for mapping large, multiple-IP-block designs to channel-width constrained FPGAs. Most FPGA clustering tools [2, 3, 11] aim to red...
Marvin Tom, Guy G. Lemieux
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