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» Timed Circuit Synthesis Using Implicit Methods
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DATE
2005
IEEE
118views Hardware» more  DATE 2005»
15 years 11 months ago
A Tool and Methodology for AC-Stability Analysis of Continuous-Time Closed-Loop Systems
—Presented are a methodology and a DFII-based tool for AC-stability analysis of a wide variety of closed-loop continuous-time (operational amplifiers and other linear circuits). ...
Momchil Milev, Rod Burt
CODES
2001
IEEE
15 years 9 months ago
Formal synthesis and code generation of embedded real-time software
Due to rapidly increasing system complexity, shortening time-tomarket, and growing demand for hard real-time systems, formal methods are becoming indispensable in the synthesis of...
Pao-Ann Hsiung
VTS
2003
IEEE
122views Hardware» more  VTS 2003»
15 years 11 months ago
A Reconfigurable Shared Scan-in Architecture
In this paper, an efficient technique for test data volume reduction based on the shared scan-in (Illinois Scan) architecture and the scan chain reconfiguration (Dynamic Scan) arc...
Samitha Samaranayake, Emil Gizdarski, Nodari Sitch...
VCBM
2010
15 years 21 days ago
Fast and Smooth Interactive Segmentation of Medical Images Using Variational Interpolation
We present a fast and interactive segmentation method for medical images that allows a smooth reconstruction of an object's surface from a set of user drawn, three-dimensiona...
Frank Heckel, Olaf Konrad, Heinz-Otto Peitgen
DATE
2008
IEEE
111views Hardware» more  DATE 2008»
16 years 14 days ago
Incremental Criticality and Yield Gradients
— Criticality and yield gradients are two crucial diagnostic metrics obtained from Statistical Static Timing Analysis (SSTA). They provide valuable information to guide timing op...
Jinjun Xiong, Vladimir Zolotov, Chandu Visweswaria...