769 search results - page 54 / 154 » Timed Circuit Synthesis Using Implicit Methods |
164
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ICCAD
2003
IEEE
15 years 11 months ago
2003
IEEE
Process variations have become a critical issue in performance verification of high-performance designs. We present a new, statistical timing analysis method that accounts for int...
157
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DATE
2008
IEEE
16 years 13 days ago
2008
IEEE
Multi-input addition is an important operation for many DSP and video processing applications. On FPGAs, multi-input addition has traditionally been implemented using trees of car...
144
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GLVLSI
2000
IEEE
15 years 10 months ago
2000
IEEE
: We propose a novel evolutionary approach to the problem of timing-driven FPGA placement. The method used is evolutionary programming (EP) with incremental position encoded in the...
149
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SIGGRAPH
1998
ACM
15 years 10 months ago
1998
ACM
The bottle-neck in most cloth simulation systems is that time steps must be small to avoid numerical instability. This paper describes a cloth simulation system that can stably ta...
187
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CHES
2011
Springer
14 years 6 months ago
2011
Springer
Abstract. The paper presents a novel and efficient method to generate true random numbers on FPGAs by inducing metastability in bi-stable circuit elements, e.g. flip-flops. Meta...