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VLSID
2008
IEEE
122views VLSI» more  VLSID 2008»
16 years 6 months ago
A Module Checking Based Converter Synthesis Approach for SoCs
Protocol conversion involves the use of a converter to control communication between two or more protocols such that desired system-level specifications can be satisfied. We invest...
Roopak Sinha, Partha S. Roop, Samik Basu
ICSE
2004
IEEE-ACM
16 years 6 months ago
Efficient Decentralized Monitoring of Safety in Distributed Systems
We describe an efficient decentralized monitoring algorithm that monitors a distributed program's execution to check for violations of safety properties. The monitoring is ba...
Koushik Sen, Abhay Vardhan, Gul Agha, Grigore Rosu
DLOG
2008
15 years 8 months ago
Decidable Reasoning over Timestamped Conceptual Models
We show that reasoning in the temporal conceptual model ERV T , a fragment of ERV T that only allows timestamping is complete for 2-ExpTime. The membership result is based on an em...
Alessandro Artale, David Toman
FODO
1998
Springer
242views Algorithms» more  FODO 1998»
15 years 10 months ago
Optimizing OID Indexing Cost in Temporal Object-Oriented Database Systems
In object-oriented database systems (OODB) with logical OIDs, an OID index (OIDX) is needed to map from OID to the physical location of the object. In a transaction time temporal ...
Kjetil Nørvåg, Kjell Bratbergsengen
QEST
2005
IEEE
15 years 11 months ago
iLTLChecker: A Probabilistic Model Checker for Multiple DTMCs
iLTL is a probabilistic temporal logic that can specify properties of multiple discrete time Markov chains (DTMCs). In this paper, we describe two related tools: MarkovEstimator a...
YoungMin Kwon, Gul A. Agha