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MICRO
2007
IEEE
141views Hardware» more  MICRO 2007»
16 years 28 days ago
Composable Lightweight Processors
Modern chip multiprocessors (CMPs) are designed to exploit both instruction-level parallelism (ILP) within processors and thread-level parallelism (TLP) within and across processo...
Changkyu Kim, Simha Sethumadhavan, M. S. Govindan,...
MICRO
2007
IEEE
103views Hardware» more  MICRO 2007»
16 years 28 days ago
Mitigating Parameter Variation with Dynamic Fine-Grain Body Biasing
Parameter variation is detrimental to a processor’s frequency and leakage power. One proposed technique to mitigate it is Fine-Grain Body Biasing (FGBB), where different parts o...
Radu Teodorescu, Jun Nakano, Abhishek Tiwari, Jose...
MICRO
2007
IEEE
79views Hardware» more  MICRO 2007»
16 years 28 days ago
Self-calibrating Online Wearout Detection
Technology scaling, characterized by decreasing feature size, thinning gate oxide, and non-ideal voltage scaling, will become a major hindrance to microprocessor reliability in fu...
Jason A. Blome, Shuguang Feng, Shantanu Gupta, Sco...
NCA
2007
IEEE
16 years 28 days ago
Implementing Atomic Data through Indirect Learning in Dynamic Networks
Developing middleware services for dynamic distributed systems, e.g., ad-hoc networks, is a challenging task given that such services deal with dynamically changing membership and...
Kishori M. Konwar, Peter M. Musial, Nicolas C. Nic...
SASO
2007
IEEE
16 years 28 days ago
Leveraging Resource Prediction for Anticipatory Dynamic Configuration
Self-adapting systems based on multiple concurrent applications must decide how to allocate scarce resources to applications and how to set the quality parameters of each applicat...
Vahe Poladian, David Garlan, Mary Shaw, M. Satyana...