We present a framework for integrated scheduling of continuous media (CM) and other applications. The framework, called ARC scheduling, consists of a rate-controlled on-line CPU sc...
The performance of current transaction processing systems largely depends on human experts for administration and tuning. These experts have to specify a multitude of internal con...
Several industrial FPGA routing architectures have been shown to have no efficient routing algorithms (unless P=NP) [3,4]. Here, we further investigate if the intractability of th...
Input/output subsystem performance is currently receiving considerable research attention. Signi cant e ort has been focused on reducing average I/O response times and increasing ...
As multiprocessor sizes scale and computer architects turn to interconnection networks with non-uniform communication latencies, the lure of exploiting communication locality to i...