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ISPAN
2002
IEEE
15 years 11 months ago
Automatic Processor Lower Bound Formulas for Array Computations
In the directed acyclic graph (dag) model of algorithms, consider the following problem for precedence-constrained multiprocessor schedules for array computations: Given a sequenc...
Peter R. Cappello, Ömer Egecioglu
ISSS
2002
IEEE
125views Hardware» more  ISSS 2002»
15 years 11 months ago
Design Experience of a Chip Multiprocessor Merlot and Expectation to Functional Verification
We have fabricated a Chip Multiprocessor prototype code-named Merlot to proof our novel speculative multithreading architecture. On Merlot, multiple threads provide wider issue wi...
Satoshi Matsushita
IV
2002
IEEE
124views Visualization» more  IV 2002»
15 years 11 months ago
Numerical Solving of Geometric Constraints
: In computer-aided design, geometric modeling by constraints enables users to describe shapes by relationships called constraints between geometric elements. The problem is to der...
Samy Ait-Aoudia
MICRO
2002
IEEE
97views Hardware» more  MICRO 2002»
15 years 11 months ago
Instruction fetch deferral using static slack
In this paper we present an approach to boosting performance and tolerating latency by deferring non-critical instructions into a deferred queue for later processing. As such, ins...
Gregory A. Muthler, David Crowe, Sanjay J. Patel, ...
VISUALIZATION
2002
IEEE
15 years 11 months ago
GeneVis: Visualization Tools for Genetic Regulatory Network Dynamics
GeneVis provides a visual environment for exploring the dynamics of genetic regulatory networks. At present time, genetic regulation is the focus of intensive research worldwide, ...
Charles A. H. Baker, M. Sheelagh T. Carpendale, Pr...
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