658 search results - page 48 / 132 » Time Management in the DoD High Level Architecture |
182
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CJ
2006
15 years 6 months ago
2006
Most microprocessor chips today use an out-of-order instruction execution mechanism. This mechanism allows superscalar processors to extract reasonably high levels of instruction ...
165
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EUC
2005
Springer
15 years 11 months ago
2005
Springer
This paper presents a distributed middleware architecture based on a service-oriented approach, to manage high volume sensor events. Event management takes a multi-step operation f...
210
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PPOPP
2006
ACM
16 years 7 days ago
2006
ACM
Applications need to become more concurrent to take advantage of the increased computational power provided by chip level multiprocessing. Programmers have traditionally managed t...
174
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WEBNET
1997
15 years 7 months ago
1997
: We are building an infrastructure for the platform-independent distribution and execution of high-performance mobile code as a future Internet technology to complement and perhap...
181
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IFIP
2007
Springer
16 years 13 days ago
2007
Springer
Hybrid networks are networks capable of switching data at multiple levels (optical and IP packet level) by means of multi-service optical switches. As a result of that, huge flows...