821 search results - page 17 / 165 » Time Dependent Processing in a Parallel Pipeline Architectur... |
145
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CW
2006
IEEE
16 years 27 min ago
2006
IEEE
The geospatial category of simulations is used to show how origin centric techniques can solve a number of accuracy related problems common to 3D computer graphics applications. P...
150
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IPPS
1998
IEEE
15 years 9 months ago
1998
IEEE
We compare the performance of systems consisting of one large cluster containing q processors with systems where processors are grouped into k clusters containing u processors eac...
184
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ISCAPDCS
2001
15 years 7 months ago
2001
This paper presents the evaluation of a non-blocking, decoupled memory/execution, multithreaded architecture known as the Scheduled Dataflow (SDF). The major recent trend in digit...
158
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DAC
1994
ACM
15 years 10 months ago
1994
ACM
We present a systematic approach to synthesize an instruction set such that the given application software can be efficiently mapped to a parameterized, pipelined microarchitectur...
172
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IPPS
2000
IEEE
15 years 10 months ago
2000
IEEE
Many techniques for increasing the amount of instruction-level parallelism (ILP) put increased pressure on the registers inside a CPU. These techniques allow for more operations t...