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VLSISP
2011
358views Database» more  VLSISP 2011»
15 years 1 months ago
Accelerating Machine-Learning Algorithms on FPGAs using Pattern-Based Decomposition
Machine-learning algorithms are employed in a wide variety of applications to extract useful information from data sets, and many are known to suffer from superlinear increases in ...
Karthik Nagarajan, Brian Holland, Alan D. George, ...
TR
2010
159views Hardware» more  TR 2010»
15 years 1 months ago
Accelerated Degradation Tests Applied to Software Aging Experiments
Abstract--In the past ten years, the software aging phenomenon has been systematically researched, and recognized by both academic, and industry communities as an important obstacl...
Rivalino Matias, Pedro Alberto Barbetta, Kishor S....
ISCA
2011
IEEE
313views Hardware» more  ISCA 2011»
14 years 10 months ago
FabScalar: composing synthesizable RTL designs of arbitrary cores within a canonical superscalar template
A growing body of work has compiled a strong case for the single-ISA heterogeneous multi-core paradigm. A single-ISA heterogeneous multi-core provides multiple, differently-design...
Niket Kumar Choudhary, Salil V. Wadhavkar, Tanmay ...
CLUSTER
2010
IEEE
14 years 10 months ago
Middleware support for many-task computing
Many-task computing aims to bridge the gap between two computing paradigms, high throughput computing and high performance computing. Many-task computing denotes highperformance co...
Ioan Raicu, Ian T. Foster, Mike Wilde, Zhao Zhang,...
HPCA
2011
IEEE
14 years 10 months ago
MOPED: Orchestrating interprocess message data on CMPs
Future CMPs will combine many simple cores with deep cache hierarchies. With more cores, cache resources per core are fewer, and must be shared carefully to avoid poor utilization...
Junli Gu, Steven S. Lumetta, Rakesh Kumar, Yihe Su...