Sciweavers

6111 search results - page 976 / 1223
» Time, Hardware, and Uniformity
Sort
View
ICS
2007
Tsinghua U.
16 years 24 days ago
Performance driven data cache prefetching in a dynamic software optimization system
Software or hardware data cache prefetching is an efficient way to hide cache miss latency. However effectiveness of the issued prefetches have to be monitored in order to maximi...
Jean Christophe Beyler, Philippe Clauss
SAMOS
2007
Springer
16 years 23 days ago
Online Prediction of Applications Cache Utility
— General purpose architectures are designed to offer average high performance regardless of the particular application that is being run. Performance and power inefficiencies a...
Miquel Moretó, Francisco J. Cazorla, Alex R...
ECBS
2006
IEEE
122views Hardware» more  ECBS 2006»
16 years 21 days ago
Customer-oriented Development of Complex Distributed Systems
Complex and distributed systems are more and more common. Hardware is going from strength to strength and is embedded in high performance peer-to-peer networks mostly. The task of...
Ivonne Erfurth
ACMMSP
2006
ACM
260views Hardware» more  ACMMSP 2006»
16 years 19 days ago
Seven at one stroke: results from a cache-oblivious paradigm for scalable matrix algorithms
A blossoming paradigm for block-recursive matrix algorithms is presented that, at once, attains excellent performance measured by • time, • TLB misses, • L1 misses, • L2 m...
Michael D. Adams, David S. Wise
CODES
2005
IEEE
16 years 8 days ago
Power-smart system-on-chip architecture for embedded cryptosystems
In embedded cryptosystems, sensitive information can leak via timing, power, and electromagnetic channels. We introduce a novel power-smart system-on-chip architecture that provid...
Radu Muresan, Haleh Vahedi, Y. Zhanrong, Stefano G...