The instruction scheduling logic used in modern superscalar microprocessors often relies on associative searching of the issue queue entries to dynamically wakeup instructions for...
Joseph J. Sharkey, Dmitry V. Ponomarev, Kanad Ghos...
In this paper, we present a simulation-based study of BitTorrent. Our results confirm that BitTorrent performs nearoptimally in terms of uplink bandwidth utilization and download...
Ashwin R. Bharambe, Cormac Herley, Venkata N. Padm...
Abstract. We address the issue of efficiently automating assume-guarantee reasoning for simulation conformance between finite state systems and specifications. We focus on a non...
Sagar Chaki, Edmund M. Clarke, Nishant Sinha, Pras...
We consider in the current paper the issue of exploiting the structural form of Esterel programs [BG92] to partition the algorithmic RSS (reachable state space) fix-point construc...
This work explores the effect of adding a timing driven functional decomposition step to the traditional field programmable gate array (FPGA) CAD flow. Once placement has comple...
Valavan Manohararajah, Deshanand P. Singh, Stephen...