Sciweavers

6111 search results - page 925 / 1223
» Time, Hardware, and Uniformity
Sort
View
ISLPED
2005
ACM
150views Hardware» more  ISLPED 2005»
16 years 8 days ago
Instruction packing: reducing power and delay of the dynamic scheduling logic
The instruction scheduling logic used in modern superscalar microprocessors often relies on associative searching of the issue queue entries to dynamically wakeup instructions for...
Joseph J. Sharkey, Dmitry V. Ponomarev, Kanad Ghos...
SIGMETRICS
2005
ACM
113views Hardware» more  SIGMETRICS 2005»
16 years 8 days ago
Some observations on bitTorrent performance
In this paper, we present a simulation-based study of BitTorrent. Our results confirm that BitTorrent performs nearoptimally in terms of uplink bandwidth utilization and download...
Ashwin R. Bharambe, Cormac Herley, Venkata N. Padm...
CAV
2005
Springer
99views Hardware» more  CAV 2005»
16 years 8 days ago
Automated Assume-Guarantee Reasoning for Simulation Conformance
Abstract. We address the issue of efficiently automating assume-guarantee reasoning for simulation conformance between finite state systems and specifications. We focus on a non...
Sagar Chaki, Edmund M. Clarke, Nishant Sinha, Pras...
CAV
2005
Springer
86views Hardware» more  CAV 2005»
16 years 8 days ago
Syntax-Driven Reachable State Space Construction of Synchronous Reactive Programs
We consider in the current paper the issue of exploiting the structural form of Esterel programs [BG92] to partition the algorithmic RSS (reachable state space) fix-point construc...
Eric Vecchié, Robert de Simone
FPL
2005
Springer
114views Hardware» more  FPL 2005»
16 years 7 days ago
Post-Placement BDD-Based Decomposition for FPGAs
This work explores the effect of adding a timing driven functional decomposition step to the traditional field programmable gate array (FPGA) CAD flow. Once placement has comple...
Valavan Manohararajah, Deshanand P. Singh, Stephen...