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ISCAS
2005
IEEE
127views Hardware» more  ISCAS 2005»
16 years 9 days ago
Wire-driven microarchitectural design space exploration
— In this paper, we propose an interconnect-driven framework that performs an efficient and effective design space exploration for deep submicron processor architecture design. ...
Mongkol Ekpanyapong, Chinnakrishnan S. Ballapuram,...
ISCAS
2005
IEEE
126views Hardware» more  ISCAS 2005»
16 years 9 days ago
Noise-tolerant XOR-based conditional keeper for high fan-in dynamic circuits
—Noise-tolerant XOR-based conditional keeper for high fan-in dynamic circuits is presented in this paper. Noise immunity is enhanced by conditionally turning on the conditional k...
Chung-Hsien Hua, Wei Hwang, Chih-Kai Chen
ISCAS
2005
IEEE
124views Hardware» more  ISCAS 2005»
16 years 9 days ago
Parallel FFT computation with a CDMA-based network-on-chip
— Fast Fourier transform (FFT) algorithms are used in a wide variety of digital signal processing applications and many of these require high-performance parallel implementations...
Daewook Kim, Manho Kim, Gerald E. Sobelman
ISCAS
2005
IEEE
168views Hardware» more  ISCAS 2005»
16 years 9 days ago
Is home network application acceptable or not?
— Application of the home network is the most important factor to make the future home network environment pervasive. Although home network environment allows us to control appli...
Ikuo Keshi, Yumi Shiraishi, Hiroaki Niwamoto, Mino...
ISCAS
2005
IEEE
138views Hardware» more  ISCAS 2005»
16 years 9 days ago
A low spur fractional-N frequency synthesizer architecture
— A new architecture of a fractional-N phase-locked loop (PLL) frequency synthesizer is presented in this paper. The unique feature of the proposed frequency synthesizer is a loo...
Volodymyr Kratyuk, Pavan Kumar Hanumolu, Un-Ku Moo...