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ASPDAC
2004
ACM
96views Hardware» more  ASPDAC 2004»
15 years 10 months ago
Rate analysis for streaming applications with on-chip buffer constraints
While mapping a streaming (such as multimedia or network packet processing) application onto a specified architecture, an important issue is to determine the input stream rates tha...
Alexander Maxiaguine, Simon Künzli, Samarjit ...
ASPDAC
2004
ACM
89views Hardware» more  ASPDAC 2004»
15 years 10 months ago
Predictable design of low power systems by pre-implementation estimation and optimization
- Each year tens of billions of Dollars are wasted by the microelectronics industry because of missed deadlines and delayed design projects. These delays are partially due to desig...
Wolfgang Nebel
ASPDAC
2004
ACM
218views Hardware» more  ASPDAC 2004»
15 years 10 months ago
A compressed frame buffer to reduce display power consumption in mobile systems
Abstract-- Despite the limited power available in a batteryoperated hand-held device, a display system must still have an enough resolution and sufficient color depth to deliver th...
Hojun Shim, Naehyuck Chang, Massoud Pedram
ASYNC
2004
IEEE
98views Hardware» more  ASYNC 2004»
15 years 10 months ago
Synthesis of Speed Independent Circuits Based on Decomposition
This paper presents a decomposition method for speedindependent circuit design that is capable of significantly reducing the cost of synthesis. In particular, this method synthesi...
Tomohiro Yoneda, Hiroomi Onda, Chris J. Myers
ATS
2004
IEEE
87views Hardware» more  ATS 2004»
15 years 10 months ago
Low Power BIST with Smoother and Scan-Chain Reorder
In this paper, we propose a low-power testing methodology for the scan-based BIST. A smoother is included in the test pattern generator (TPG) to reduce average power consumption d...
Nan-Cheng Lai, Sying-Jyan Wang, Yu-Hsuan Fu