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ISCA
2003
IEEE
93views Hardware» more  ISCA 2003»
16 years 6 days ago
Improving Dynamic Cluster Assignment for Clustered Trace Cache Processors
This work examines dynamic cluster assignment for a clustered trace cache processor (CTCP). Previously proposed cluster assignment techniques run into unique problems as issue wid...
Ravi Bhargava, Lizy Kurian John
ISCA
2003
IEEE
107views Hardware» more  ISCA 2003»
16 years 6 days ago
Positional Adaptation of Processors: Application to Energy Reduction
Although adaptive processors can exploit application variability to improve performance or save energy, effectively managing their adaptivity is challenging. To address this probl...
Michael C. Huang, Jose Renau, Josep Torrellas
ISCA
2003
IEEE
144views Hardware» more  ISCA 2003»
16 years 6 days ago
Half-Price Architecture
Current-generation microprocessors are designed to process instructions with one and two source operands at equal cost. Handling two source operands requires multiple ports for ea...
Ilhyun Kim, Mikko H. Lipasti
ISCA
2003
IEEE
88views Hardware» more  ISCA 2003»
16 years 6 days ago
Phase Tracking and Prediction
In a single second a modern processor can execute billions of instructions. Obtaining a bird’s eye view of the behavior of a program at these speeds can be a difficult task whe...
Timothy Sherwood, Suleyman Sair, Brad Calder
ISCAS
2003
IEEE
128views Hardware» more  ISCAS 2003»
16 years 6 days ago
Robust digital image-in-image watermarking algorithm using the fast Hadamard transform
In this paper, a robust and efficient digital image watermarking algorithm using the fast Hadamard transform (FHT) is proposed for the copyright protection of digital images. This...
Anthony Tung Shuen Ho, Jun Shen, A. K. K. Chow, J....