6111 search results - page 823 / 1223 » Time, Hardware, and Uniformity |
179
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MICRO
2006
IEEE
16 years 29 days ago
2006
IEEE
One of the main challenges of modern processor design is the implementation of a scalable and efficient mechanism to detect memory access order violations as a result of out-of-o...
211
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MTV
2006
IEEE
16 years 29 days ago
2006
IEEE
Simulation-based validation of the current industrial processors typically use huge number of test programs generated at instruction set architecture (ISA) level. However, archite...
180
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SBACPAD
2006
IEEE
2006
IEEE
Scalable Parallel Implementation of Bayesian Network to Junction Tree Conversion for Exact Inference
16 years 29 days ago
We present a scalable parallel implementation for converting a Bayesian network to a junction tree, which can then be used for a complete parallel implementation for exact inferen...
186
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VLSID
2006
IEEE
16 years 29 days ago
2006
IEEE
Low density parity check (LDPC) codes are one of the most powerful error correcting codes known. Recent research have pointed out their potential for a low cost, low latency hardw...
172
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ASPDAC
2006
ACM
16 years 28 days ago
2006
ACM
- This paper presents an H.264/AVC baseline profile decoder based on a SoC platform design methodology. The overall decoding throughput is increased by optimized software and a ded...