Sciweavers

6111 search results - page 799 / 1223
» Time, Hardware, and Uniformity
Sort
View
ICCAD
2002
IEEE
129views Hardware» more  ICCAD 2002»
16 years 3 months ago
Transmission line design of clock trees
We investigate appropriate regimes for transmission line propagation of signals on digital integrated circuits. We start from exact solutions to the transmission line equations pr...
Rafael Escovar, Roberto Suaya
ICCAD
2002
IEEE
108views Hardware» more  ICCAD 2002»
16 years 3 months ago
A precorrected-FFT method for simulating on-chip inductance
The simulation of on-chip inductance using PEEC-based circuit analysis methods often requires the solution of a subproblem where an extracted inductance matrix must be multiplied ...
Haitian Hu, David Blaauw, Vladimir Zolotov, Kaushi...
ICCAD
2002
IEEE
107views Hardware» more  ICCAD 2002»
16 years 3 months ago
Theoretical and practical validation of combined BEM/FEM substrate resistance modeling
In mixed-signal designs, substrate noise originating from the digital part can seriously influence the functionality of the analog part. As such, accurately modeling the properti...
Eelco Schrik, Patrick Dewilde, N. P. van der Meijs
ICCAD
2001
IEEE
100views Hardware» more  ICCAD 2001»
16 years 3 months ago
Coupled Analysis of Electromigration Reliability and Performance in ULSI Signal Nets
In deep submicron VLSI circuits, interconnect reliability due to electromigration and thermal effects is fast becoming a serious design issue particularly for long signal lines. T...
Kaustav Banerjee, Amit Mehrotra
ICCAD
2001
IEEE
111views Hardware» more  ICCAD 2001»
16 years 3 months ago
Congestion Aware Layout Driven Logic Synthesis
In this paper, we present novel algorithms that effectively combine physical layout and early logic synthesis to improve overall design quality. In addition, we employ partitionin...
Thomas Kutzschebauch, Leon Stok