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ICCAD
2003
IEEE
161views Hardware» more  ICCAD 2003»
16 years 3 months ago
A General S-Domain Hierarchical Network Reduction Algorithm
This paper presents an efficient method to reduce complexities of a linear network in s-domain. The new method works on circuit matrices directly and reduces the circuit complexi...
Sheldon X.-D. Tan
ICCAD
2003
IEEE
154views Hardware» more  ICCAD 2003»
16 years 3 months ago
Length-Matching Routing for High-Speed Printed Circuit Boards
As the clock frequencies used in industrial applications increase, the timing requirements imposed on routing problems become tighter. So, it becomes important to route the nets w...
Muhammet Mustafa Ozdal, Martin D. F. Wong
ICCAD
2002
IEEE
107views Hardware» more  ICCAD 2002»
16 years 3 months ago
Characteristic faults and spectral information for logic BIST
We present a new method of built-in-self-test (BIST) for sequential circuits and system-on-a-chip (SOC) using characteristic faults and circuitspecific spectral information in th...
Xiaoding Chen, Michael S. Hsiao
ICCAD
2002
IEEE
101views Hardware» more  ICCAD 2002»
16 years 3 months ago
Frame-based dynamic voltage and frequency scaling for a MPEG decoder
This paper describes a dynamic voltage and frequency scaling (DVFS) technique for MPEG decoding to reduce the energy consumption while maintaining a quality of service (QoS) constr...
Kihwan Choi, Karthik Dantu, Wei-Chung Cheng, Masso...
ICCAD
2002
IEEE
103views Hardware» more  ICCAD 2002»
16 years 3 months ago
Synthesis of customized loop caches for core-based embedded systems
Embedded system programs tend to spend much time in small loops. Introducing a very small loop cache into the instruction memory hierarchy has thus been shown to substantially red...
Susan Cotterell, Frank Vahid