6111 search results - page 792 / 1223 » Time, Hardware, and Uniformity |
193
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ICCAD
2008
IEEE
16 years 3 months ago
2008
IEEE
Abstract— Process variations make at-speed testing significantly more difficult. They cause subtle delay changes that are distributed rather than the localized nature of a trad...
188
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ICCAD
2007
IEEE
16 years 3 months ago
2007
IEEE
—As the 193nm lithography is likely to be used for 45nm and even 32nm processes, much more stringent requirement will be posed on Optical Proximity Correction (OPC) technologies....
164
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ICCAD
2007
IEEE
2007
IEEE
Optimal polynomial-time interprocedural register allocation for high-level synthesis and ASIP design
16 years 3 months ago
—Register allocation, in high-level synthesis and ASIP design, is the process of determining the number of registers to include in the resulting circuit or processor. The goal is...
138
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ICCAD
2007
IEEE
16 years 3 months ago
2007
IEEE
Abstract—Because of the today’s market demand for highperformance, high-density portable hand-held applications, electronic system design technology has shifted the focus from ...
193
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ICCAD
2007
IEEE
16 years 3 months ago
2007
IEEE
- Power gating is an efficient technique for reducing leakage power in electronic devices by disconnecting blocks idle for long periods of time from the power supply. Disconnecting...