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DFT
2003
IEEE
142views VLSI» more  DFT 2003»
16 years 10 days ago
Exploiting Instruction Redundancy for Transient Fault Tolerance
This paper presents an approach for integrating fault-tolerance techniques into microprocessors by utilizing instruction redundancy as well as time redundancy. Smaller and smaller...
Toshinori Sato
196
Voted
RTAS
2003
IEEE
16 years 10 days ago
A Cyclic-Executive-Based QoS Guarantee over USB
Universal Serial Bus (USB) is a popular standard for PC peripheral devices because of its versatile peripheral interconnection specifications. USB not only provides simplified h...
Chih-Yuan Huang, Li-Pin Chang, Tei-Wei Kuo
FPGA
2003
ACM
116views FPGA» more  FPGA 2003»
16 years 8 days ago
Hardware-assisted simulated annealing with application for fast FPGA placement
To truly exploit FPGAs for rapid turn-around development and prototyping, placement times must be reduced to seconds; latebound, reconfigurable computing applications may demand p...
Michael G. Wrighton, André DeHon
FPL
2003
Springer
100views Hardware» more  FPL 2003»
16 years 8 days ago
Two Approaches for a Single-Chip FPGA Implementation of an Encryptor/Decryptor AES Core
In this paper we present a single-chip FPGA full encryptor/decryptor core design of the AES algorithm. Our design performs all of them, encryption, decryption and key scheduling pr...
Nazar A. Saqib, Francisco Rodríguez-Henr&ia...
HPCA
2000
IEEE
15 years 11 months ago
Design of a Parallel Vector Access Unit for SDRAM Memory Systems
We are attacking the memory bottleneck by building a “smart” memory controller that improves effective memory bandwidth, bus utilization, and cache efficiency by letting appl...
Binu K. Mathew, Sally A. McKee, John B. Carter, Al...