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ISPD
2003
ACM
103views Hardware» more  ISPD 2003»
16 years 14 days ago
An integrated floorplanning with an efficient buffer planning algorithm
Previous works on buffer planning are mainly based on fixed die placement. It is necessary to reduce the complexity of computing the feasible buffer insertion sites to integrate t...
Yuchun Ma, Xianlong Hong, Sheqin Dong, Song Chen, ...
DATE
2010
IEEE
132views Hardware» more  DATE 2010»
16 years 9 days ago
Programmable aging sensor for automotive safety-critical applications
- Electronic systems for safety-critical automotive applications must operate for many years in harsh environments. Reliability issues are worsening with device scaling down, while...
Julio César Vázquez, Víctor H...
DATE
2010
IEEE
111views Hardware» more  DATE 2010»
16 years 9 days ago
Evaluation of runtime task mapping heuristics with rSesame - a case study
Abstract—rSesame is a generic modeling and simulation framework which can explore and evaluate reconfigurable systems at the early design stages. The framework can be used to ex...
Kamana Sigdel, Mark Thompson, Carlo Galuzzi, Andy ...
DATE
2002
IEEE
144views Hardware» more  DATE 2002»
16 years 5 days ago
Design Automation for Deepsubmicron: Present and Future
Advancing technology drives design technology and thus design automation EDA. How to model interconnect, how to handle degradation of signal integrity and increasing power densi...
Ralph H. J. M. Otten, Raul Camposano, Patrick Groe...
ISQED
2002
IEEE
126views Hardware» more  ISQED 2002»
16 years 3 days ago
Formulae for Performance Optimization and Their Applications to Interconnect-Driven Floorplanning
As the process technology advances into the deep submicron era, interconnect plays a dominant role in determining circuit performance. Buffer insertion/sizing and wire sizing are ...
Nicholas Chia-Yuan Chang, Yao-Wen Chang, Iris Hui-...