6111 search results - page 708 / 1223 » Time, Hardware, and Uniformity |
187
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MTV
2005
IEEE
16 years 24 days ago
2005
IEEE
The increasing complexity and size of system level design models introduces a difficult challenge for validating them. Hence, in most industries, design validation takes a large p...
217
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NIME
2005
Springer
16 years 21 days ago
2005
Springer
WISEAR (Wireless Sensor Array) is a Linux based Embeddedx86 TS- 5600 SBC (Single Board Computer) specifically configured for use with music, dance and video performance technologi...
190
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WMPI
2004
ACM
16 years 19 days ago
2004
ACM
During a program’s runtime, the stack and data segments of the main memory often contain much redundancy, which makes them good candidates for compression. Compression and decomp...
191
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DATE
2003
IEEE
16 years 15 days ago
2003
IEEE
In this paper we propose a design technique to pipeline cache memories for high bandwidth applications. With the scaling of technology cache access latencies are multiple clock cy...
182
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DATE
2003
IEEE
16 years 15 days ago
2003
IEEE
Instruction reuse is a microarchitectural technique that improves the execution time of a program by removing redundant computations at run-time. Although this is the job of an op...