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DATE
2009
IEEE
189views Hardware» more  DATE 2009»
16 years 2 months ago
CUFFS: An instruction count based architectural framework for security of MPSoCs
—Multiprocessor System on Chip (MPSoC) architecture is rapidly gaining momentum for modern embedded devices. The vulnerabilities in software on MPSoCs are often exploited to caus...
Krutartha Patel, Sri Parameswaran, Roshan G. Ragel
ISCA
2007
IEEE
149views Hardware» more  ISCA 2007»
16 years 1 months ago
Virtual private caches
Virtual Private Machines (VPM) provide a framework for Quality of Service (QoS) in CMP-based computer systems. VPMs incorporate microarchitecture mechanisms that allow shares of h...
Kyle J. Nesbit, James Laudon, James E. Smith
MICRO
2006
IEEE
124views Hardware» more  MICRO 2006»
16 years 1 months ago
LIFT: A Low-Overhead Practical Information Flow Tracking System for Detecting Security Attacks
Computer security is severely threatened by software vulnerabilities. Prior work shows that information flow tracking (also referred to as taint analysis) is a promising techniqu...
Feng Qin, Cheng Wang, Zhenmin Li, Ho-Seop Kim, Yua...
PACT
2005
Springer
16 years 22 days ago
Optimal Behavior of a Moving Creature in the Cellular Automata Model
The goal of our investigation is to find automatically the best rule for a cell in the cellular automata model. The cells are either of type Obstacle, Empty or Creature. Only Crea...
Mathias Halbach, Rolf Hoffmann
ISCA
2003
IEEE
150views Hardware» more  ISCA 2003»
16 years 15 days ago
Cyclone: A Broadcast-Free Dynamic Instruction Scheduler with Selective Replay
To achieve high instruction throughput, instruction schedulers must be capable of producing high-quality schedules that maximize functional unit utilization while at the same time...
Dan Ernst, Andrew Hamel, Todd M. Austin