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ISCA
2011
IEEE
271views Hardware» more  ISCA 2011»
14 years 11 months ago
CRIB: consolidated rename, issue, and bypass
Conventional high-performance processors utilize register renaming and complex broadcast-based scheduling logic to steer instructions into a small number of heavily-pipelined exec...
Erika Gunadi, Mikko H. Lipasti
IWMM
2011
Springer
217views Hardware» more  IWMM 2011»
14 years 10 months ago
On the theory and potential of LRU-MRU collaborative cache management
The goal of cache management is to maximize data reuse. Collaborative caching provides an interface for software to communicate access information to hardware. In theory, it can o...
Xiaoming Gu, Chen Ding
CMS
2011
229views Communications» more  CMS 2011»
14 years 7 months ago
Twin Clouds: Secure Cloud Computing with Low Latency - (Full Version)
Abstract. Cloud computing promises a cost effective enabling technology to outsource storage and massively parallel computations. However, existing approaches for provably secure ...
Sven Bugiel, Stefan Nürnberger, Ahmad-Reza Sa...
ICCAD
2001
IEEE
201views Hardware» more  ICCAD 2001»
16 years 4 months ago
An Integrated Data Path Optimization for Low Power Based on Network Flow Method
Abstract: We propose an effective algorithm for power optimization in behavioral synthesis. In previous work, it has been shown that several hardware allocation/binding problems fo...
Chun-Gi Lyuh, Taewhan Kim, Chien-Liang Liu
CGO
2010
IEEE
16 years 2 months ago
Automated just-in-time compiler tuning
Managed runtime systems, such as a Java virtual machine (JVM), are complex pieces of software with many interacting components. The Just-In-Time (JIT) compiler is at the core of t...
Kenneth Hoste, Andy Georges, Lieven Eeckhout