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AICCSA
2006
IEEE
107views Hardware» more  AICCSA 2006»
15 years 9 months ago
Exciting Stuck-Open faults in CMOS Circuits Using ILP Techniques
To excite a stuck-open fault in a CMOS combinational circuit, it is only necessary that the output of the gate containing the fault takes on opposite values during the application...
Fadi A. Aloul, Assim Sagahyroon, Bashar Al Rawi
ASPDAC
2005
ACM
81views Hardware» more  ASPDAC 2005»
15 years 9 months ago
Standard CMOS technology on-chip inductors with pn junctions substrate isolation
New substrate isolation structures using pattern stacked pn junctions for on-chip inductors in standard CMOS technology are presented. For the first time, through increasing the re...
Hongyan Jian, Zhangwen Tang, Jie He, Jinglan He, M...
ASPDAC
2005
ACM
79views Hardware» more  ASPDAC 2005»
15 years 9 months ago
Simulation acceleration of transaction-level models for SoC with RTL sub-blocks
Abstract— This paper presents an optimized channel usage between simulator and accelerator when the simulator models transaction-level SoC while accelerator models RTL sub-blocks...
Jae-Gon Lee, Woo-Seung Yang, Young-Su Kwon, Young-...
ASPDAC
2005
ACM
109views Hardware» more  ASPDAC 2005»
15 years 9 months ago
Fault tolerant nanoelectronic processor architectures
In this paper we propose a fault-tolerant processor architecture and an associated fault-tolerant computation model capable of fault tolerance in the nanoelectronic environment th...
Wenjing Rao, Alex Orailoglu, Ramesh Karri
220
Voted
ASPDAC
2005
ACM
153views Hardware» more  ASPDAC 2005»
15 years 9 months ago
Design of clocked circuits using UML
– Clocking is an essential component of any embedded system design. However, traditional design techniques are either short of clocking support or too complex for users. The Unif...
Zhenxin Sun, Weng-Fai Wong, Yongxin Zhu, Santhosh ...