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ISQED
2002
IEEE
175views Hardware» more  ISQED 2002»
16 years 10 days ago
On the Relation between SAT and BDDs for Equivalence Checking
State-of-the-art verification tools are based on efficient operations on Boolean formulas. Traditional manipulation techniques are based on Binary Decision Diagrams (BDDs) and SAT...
Sherief Reda, Rolf Drechsler, Alex Orailoglu
ITC
2002
IEEE
112views Hardware» more  ITC 2002»
16 years 10 days ago
Multiplets, Models, and the Search for Meaning: Improving Per-Test Fault Diagnosis
The advantage to “one test at a time” fault diagnosis is its ability to implicate the components of complicated defect behaviors. The disadvantage is the large size and opacit...
David B. Lavo, Ismed Hartanto, Tracy Larrabee
MICRO
2002
IEEE
104views Hardware» more  MICRO 2002»
16 years 10 days ago
Compiling for instruction cache performance on a multithreaded architecture
Instruction cache aware compilation seeks to lay out a program in memory in such a way that cache conflicts between procedures are minimized. It does this through profile-driven...
Rakesh Kumar, Dean M. Tullsen
MSE
2002
IEEE
122views Hardware» more  MSE 2002»
16 years 10 days ago
Modeling and Analyzing SMIL Documents in SAM
A composite multimedia object has specific timing relationships among the different types of component media. Coordinating the real-time presentation of information and maintaini...
Huiqun Yu, Xudong He, Shu Gao, Yi Deng
SIGMETRICS
2010
ACM
227views Hardware» more  SIGMETRICS 2010»
16 years 7 days ago
Characterizing and modeling user activity on smartphones: summary
In this paper, we present a comprehensive analysis of real smartphone usage during a 6-month study of real user activity on the Android G1 smartphone. Our goal is to study the hig...
Alex Shye, Benjamin Scholbrock, Gokhan Memik, Pete...