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ATS
2003
IEEE
98views Hardware» more  ATS 2003»
16 years 23 days ago
Automatic Design Validation Framework for HDL Descriptions via RTL ATPG
We present a framework for high-level design validation using an efficient register-transfer level (RTL) automatic test pattern generator (ATPG). The RTL ATPG generates the test ...
Liang Zhang, Michael S. Hsiao, Indradeep Ghosh
DATE
2003
IEEE
82views Hardware» more  DATE 2003»
16 years 22 days ago
Scaling into Ambient Intelligence
Envision the situation that high quality information and entertainment is easily accessible to anyone, anywhere, at any time, and on any device. How realistic is this vision? And ...
Twan Basten, Luca Benini, Anantha Chandrakasan, Me...
DATE
2003
IEEE
122views Hardware» more  DATE 2003»
16 years 22 days ago
Synthesis of Complex Control Structures from Behavioral SystemC Models
In this paper we present the results of a set of experiments we conducted in order to evaluate the viability of the behavioral synthesis, relying on the tools available at the mom...
Francesco Bruschi, Fabrizio Ferrandi
DATE
2003
IEEE
120views Hardware» more  DATE 2003»
16 years 22 days ago
SystemC-VHDL Co-Simulation and Synthesis in the HW Domain
Embedded systems design requires the development of complex HW modules to cope with the most stringent timing constraints of the specifications. This implies the need to update an...
Massimo Bombana, Francesco Bruschi
DATE
2003
IEEE
108views Hardware» more  DATE 2003»
16 years 22 days ago
System-Level Power Analysis Methodology Applied to the AMBA AHB Bus
The specification on power consumption of a digital system is extremely important due to the growing relevance of the market of portable devices and must be taken into account sin...
Marco Caldari, Massimo Conti, Massimo Coppola, Pao...