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    CAV
    2001
    Springer
    100views Hardware» more  CAV 2001»
    Automatic Abstraction for Verification of Timed Circuits and Systems
    15 years 10 months ago
    Automatic Abstraction for Verification of Timed Circuits and Systems
    Download  www.csee.usf.edu
    Hao Zheng, Eric Mercer, Chris J. Myers
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    FPL
    2001
    Springer
    78views Hardware» more  FPL 2001»
    Run-Time Performance Optimization of an FPGA-Based Deduction Engine for SAT Solvers
    15 years 10 months ago
    Run-Time Performance Optimization of an FPGA-Based Deduction Engine for SAT Solvers
    Download  halcyon.usc.edu
    Andreas Dandalis, Viktor K. Prasanna, Bharani Thir...
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    ASYNC
    2000
    IEEE
    94views Hardware» more  ASYNC 2000»
    Formal Verification of Safety Properties in Timed Circuits
    15 years 10 months ago
    Formal Verification of Safety Properties in Timed Circuits
    Download  personals.ac.upc.edu
    Marco A. Peña, Jordi Cortadella, Enric Past...
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    DATE
    2000
    IEEE
    81views Hardware» more  DATE 2000»
    Abstraction from Counters: An Application on Real-Time Systems
    15 years 10 months ago
    Abstraction from Counters: An Application on Real-Time Systems
    Download  www.date-conference.com
    George Logothetis, Klaus Schneider
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    DATE
    2000
    IEEE
    95views Hardware» more  DATE 2000»
    Analyzing Real-Time Systems
    15 years 10 months ago
    Analyzing Real-Time Systems
    Download  www.cs.cmu.edu
    Jürgen Ruf, Thomas Kropf
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