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MICRO
1998
IEEE
89views Hardware» more  MICRO 1998»
15 years 10 months ago
Load Latency Tolerance in Dynamically Scheduled Processors
This paper provides quantitative measurements of load latency tolerance in a dynamically scheduled processor. To determine the latency tolerance of each memory load operation, our...
Srikanth T. Srinivasan, Alvin R. Lebeck
ICCAD
1997
IEEE
76views Hardware» more  ICCAD 1997»
15 years 10 months ago
Simulation methods for RF integrated circuits
Abstract — The principles employed in the development of modern RF simulators are introduced and the various techniques currently in use, or expected to be in use in the next few...
Kenneth S. Kundert
ISCA
1997
IEEE
108views Hardware» more  ISCA 1997»
15 years 10 months ago
The SGI Origin: A ccNUMA Highly Scalable Server
The SGI Origin 2000 is a cache-coherent non-uniform memory access (ccNUMA) multiprocessor designed and manufactured by Silicon Graphics, Inc. The Origin system was designed from t...
James Laudon, Daniel Lenoski
ITC
1997
IEEE
73views Hardware» more  ITC 1997»
15 years 10 months ago
A Low-Overhead Design for Testability and Test Generation Technique for Core-Based Systems
In a fundamental paradigm shift in system design, entire systems are being built on a single chip, using multiple embedded cores. Though the newest system design methodology has s...
Indradeep Ghosh, Niraj K. Jha, Sujit Dey
ISPD
1997
ACM
68views Hardware» more  ISPD 1997»
15 years 10 months ago
Faster minimization of linear wirelength for global placement
A linear wirelength objective more e ectively captures timing, congestion, and other global placement considerations than a squared wirelength objective. The GORDIAN-L cell placem...
Charles J. Alpert, Tony F. Chan, Dennis J.-H. Huan...
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